Active Silicon AS-PHX-D48CL-PE4 Frame Grabber

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Phoenix-D48CL x4 is a PCI Express board for the acquisition of digital data from a variety of Camera Link sources, including digital frame capture and line scan cameras. It supports all the formats of the Base and Medium configurations, i.e. single 8 to 16 bit data, through 12 bit RGB, to four tap 12 bit sources, as well as dual Base configuration, i.e. acquisition from two asynchronous Base cameras.

Phoenix-D48CL x4 also supports various camera tap formats, such as line interlaced – adjacent lines are output simultaneously; line offset – lines are output from different parts of the CCD simultaneously; pixel interlaced – adjacent pixels on the same line are output simultaneously; and pixel offset – pixels are output from different parts of the same line simultaneously.

Phoenix-D48CL x4 supports the Power over Camera Link (PoCL) functionality with SafePower and is able to provide power to PoCL enabled cameras via the Camera Link data cable thereby removing the need for a separate power supply. Conventional non-PoCL cameras are still supported.

The majority of the functionality is implemented in a single FPGA (Field Programmable Gate Array) providing a flexible solution for interfacing to Camera Link compliant sources. The FPGA implements the PCI interface, hardware scatter-gather control, PCI Initiator Burst Control (DMA), Acquisition Control, Region of Interest (ROI) and sub-sampling control, DataMapping functions, Datapath FIFOs and Counter/Timer support. In addition the board contains Look Up Table (LUT) functionality, a dual Universal Asynchronous Receiver Transmitter (UART), 4 bit opto-isolated I/O, two 2 bit differential input ports and two 8 bit TTL I/O ports.

TECHNICAL INFORMATION:

Quick Info for the Active Silicon AS-PHX-D48CL-PE4 Frame Grabber
Buffer: 196 K FIFO
Camera Inputs: 2 Base, or 1 Medium
Host Bus: PCIe x4
Interface : Camera Link
Manufacturer: Active Silicon
Pixel Clock: 85 MHz

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